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Analog EDA

Moving to SystemC TLM for design and verification of digital hardware May 21, 2013 Moving to SystemC TLM for design and verification of digital hardware Stuart Swan, Qiang Zhu, Xingri Li, Cadence Design Systems, Inc. consider the issues faced when moving to SystemC TLM for ... Read more Synthesis-aware clock analysis and constraints generation May 13, 2013 Synthesis-aware clock analysis and constraints generation Jason Xing, Vice President of Engineering, ICScape Inc. discusses synthesis-aware clock analysis and constraints generation. ... Read more A low risk, high reward approach to adopting formal methods April 15, 2013 A low risk, high reward approach to adopting formal methods James Pascoe of STMicroelectronics R&D Ltd. describes a low risk, high reward approach to adopting formal methods to the ... Read more Using parallel FFT for multi-gigahertz FPGA signal processing April 03, 2013 Using parallel FFT for multi-gigahertz FPGA signal processing Chris Eddington and Baijayanta Ray of Synopsys Inc. explains how to use parallel FFT for multi-gigahertz FPGA signal processing. ... Read more 3D physical simulation tools provide superior FinFet predictability March 27, 2013 3D physical simulation tools provide superior FinFet predictability Dr. Asen Asenov of Gold Standard Simulations explains how 3D physical simulation tools can be used to provide superior FinFet ... Read more An introduction to offloading CPUs to FPGAs – Hardware programming for software developers March 20, 2013 An introduction to offloading CPUs to FPGAs – Hardware programming for software developers Grzegorz Gancarczyk, Maciej Wielgosz, and Kazimierz Wiatr provide an introduction to offloading CPUs to FPGAs. Read more Using 3rd party IP in ASIC/SoC design March 13, 2013 Using 3rd party IP in ASIC/SoC design Mohit Gupta of Open-Silicon Inc. outlines some of the best practices for using the ecosystem as well as some of the common ... Read more FPGA design heads into The Cloud March 04, 2013 FPGA design heads into The Cloud HarnHua Ng, Plunify explains what cloud computing has to offer for the FPGA design engineer. Read more Developing FPGA applications for Edition 2 of the IEC 61508 Safety Standard February 04, 2013 Developing FPGA applications for Edition 2 of the IEC 61508 Safety Standard Dr. Giulio Corradi of Xilinx and Romuald Girardey of Endress+Hauser focus on the application of the IEC 61508 Edition 2 Safety ... Read more Tackling large-scale SoC and FPGA prototyping debug challenges January 28, 2013 Tackling large-scale SoC and FPGA prototyping debug challenges Brad Quinton ofTektronix examines ways of tackling large-scale SoC and FPGA prototyping debug challenges. Read more
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Taking a new direction with analog The launch of the world's first digitally enhanced power analog controller marks a key development for Microchip and according to Stephen Stella, Microchip's Product Marketing Manager Analog & Interface ...
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