The new feasibility analysis mode identifies regions of the design space where all circuit sizing rules are met. This rapidly eliminates those parts of the design space which result in unstable circuits. Since only DC operating point simulations are required the mode is computationally efficient and fast. By identifying a ’feasible design space‘, the following global optimization can run much more rapidly

The AnXplorer 2010.12 supports three optimization phases: feasibility analysis, global optimisation using a single process, voltage & temperature (PVT) corner and centering over all PVT corners. The modes can be either used in sequence or combined with manual tuning.

The feasibility analysis is enabled by enhanced sizing rule evaluation and reporting. A range of sub-circuits including: - transistors in saturation, transistors in triode region, current mirrors, differential pairs, level shifters, voltage references, current mirror loads and cascode current mirrors are automatically identified. This analysis ensures that all explicit and implicit device sizing rules are met.

The 2010.12 release also provides improved technology parameter support by enabling the definition of different devices corresponding to multiple voltage regimes.

AnXplorer can fit into commonly used design toolsets as it works with industry standard SPICE netlists and simulators. A designer can define an unsized circuit, with design variables, constraints and objectives. AnXplorer will then generate an optimized, centered circuit that meets or exceeds the design objectives across all corners specified by the user. It uses a new multi-algorithmic optimization strategy aided by an expert system.

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